RISC-V 32-bit glibc port
Room 7 | Mon 13 Jan | 11:45 a.m.–12:05 p.m.
Presented by
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Alistair is an engineer working in Western Digital's R&D department he is focused on QEMU and open source RISC-V enablement. He has previous industry experience working in embedded devices, focused on business facing SoC design and software stacks. As a QEMU maintainer he is interested in improving QEMU's support for RISC-V. Alistair also contributes to the OpenEmbedded/Yocto ecosystem, buildroot, OpenSBI, Linux, U-Boot, glibc and other open source projects.
Alistair is an engineer working in Western Digital's R&D department he is focused on QEMU and open source RISC-V enablement. He has previous industry experience working in embedded devices, focused on business facing SoC design and software stacks. As a QEMU maintainer he is interested in improving QEMU's support for RISC-V. Alistair also contributes to the OpenEmbedded/Yocto ecosystem, buildroot, OpenSBI, Linux, U-Boot, glibc and other open source projects.
Abstract
A talk about the RISC-V 32-bit glibc port. This will include details about the 64-bit time_t problem and how RV32 is going to be the first 32-bit architecture with a 64-bit time_t. This talk will also discuss what the current progress of upstreaming is, what is left to be done and why it has taken so long.
Linux Australia: http://mirror.linux.org.au/pub/linux.conf.au/2020/room_7/Monday/RISCV_32bit_glibc_port.webm
YouTube: https://www.youtube.com/watch?v=wNM1VqEqvyE
A talk about the RISC-V 32-bit glibc port. This will include details about the 64-bit time_t problem and how RV32 is going to be the first 32-bit architecture with a 64-bit time_t. This talk will also discuss what the current progress of upstreaming is, what is left to be done and why it has taken so long. Linux Australia: http://mirror.linux.org.au/pub/linux.conf.au/2020/room_7/Monday/RISCV_32bit_glibc_port.webm YouTube: https://www.youtube.com/watch?v=wNM1VqEqvyE