RISC-V MiniConf
Not currently scheduled.
Presented by
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Alistair is an engineer working in Western Digital's R&D department he is focused on QEMU and open source RISC-V enablement. He has previous industry experience working in embedded devices, focused on business facing SoC design and software stacks. As a QEMU maintainer he is interested in improving QEMU's support for RISC-V. Alistair also contributes to the OpenEmbedded/Yocto ecosystem, buildroot, OpenSBI, Linux, U-Boot, glibc and other open source projects.
Abstract
The recent phenomenal growth of RISC-V proves that this new CPU architecture is no longer only an academic project and is becoming a serious contender among commercial processor architectures. Thanks to the active contributions from both industry pioneers and academic researchers, we are entering into an exciting era of open source hardware designs ranging from micro-controllers to server class enterprise systems backed by a growing open source ecosystem, constantly evolving and improving. Soon, a wider variety of RISC-V based hardware boards and extensions will likely be available, allowing a larger choice of applications beyond embedded micro-controllers.
The RISC-V track at linux.conf.au will focus on finding solutions and discussing ideas for the Linux kernel and other open source projects. This will include key areas such as secure boot, the RISC-V 32-bit glibc port, RISC-V Hypervisor extensions and other active areas. This will hopefully result in a significant increase in developer participation in code review/patch submissions for all open source projects. We can use this chance to continue discussions from Plumbers 2019 the RISC-V Summit 2019.
The recent phenomenal growth of RISC-V proves that this new CPU architecture is no longer only an academic project and is becoming a serious contender among commercial processor architectures. Thanks to the active contributions from both industry pioneers and academic researchers, we are entering into an exciting era of open source hardware designs ranging from micro-controllers to server class enterprise systems backed by a growing open source ecosystem, constantly evolving and improving. Soon, a wider variety of RISC-V based hardware boards and extensions will likely be available, allowing a larger choice of applications beyond embedded micro-controllers. The RISC-V track at linux.conf.au will focus on finding solutions and discussing ideas for the Linux kernel and other open source projects. This will include key areas such as secure boot, the RISC-V 32-bit glibc port, RISC-V Hypervisor extensions and other active areas. This will hopefully result in a significant increase in developer participation in code review/patch submissions for all open source projects. We can use this chance to continue discussions from Plumbers 2019 the RISC-V Summit 2019.